This weekend, I caught up with a presentation from @AlexOrr of Broadcom in which he talks about his “first 100 days in formal-land”.

I wanted to read it for a very long time. After reading the slides offline, I felt that this presentation was worth attending in person.

Within those slides, one can feel his experience and his desire to share it with the Design And Verification Engineer (DAVE) community.

@AlexOrr’s presentation is from #JUG2015. Blog posts related to Jasper User Group 2015 can be found here.

There are two items from his presentation I was repeating for a long time to my peers: Assertions and Jenkins. It is good to hear someone else is emphasizing on them as well.


Below are some key takeaways from Alex’s presentation. They are not new. However, they should be reminded over and over again.

Assumptions become assertions in simulation.

Do I have to retest all the reset values over and over again ?

I assume he was hinting at UVM built-in sequence uvm_reg_hw_reset_seq.

Assertions more portable than dynamic tests.

Use assertions, path spoilers, monitors, and/or illegal_bins statements. As well as $past.

Leverage “SuperLint” apps such as X-Prop.

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