Clock concurrent optimization

Since Cadence added Azuro’s ccopt by default in SOC Encounter, I think it is time to look deeper in this clock concurrent optimization. The latter was initiated by a company called Azuro which was then acquired by Cadence in July 2012. Clock concurrent optimization merges clock tree synthesis (CTS) with physical optimization, simultaneously building clocks …

Why use path_adjust ?

path_adjust is used to either relax or tighten the timing constraints (even though defined by path_delay). e.g to relax the constraints by 100ps rc:>/ path_adjust -from [all_inputs] -to [all_outputs] -delay 100 -name pa_i2o e.g to tighten the constraints by 100ps rc:>/ path_adjust -from [all_inputs] -to $all_registers -delay 100 -name pa_i2r path_adjust is thus use to …

Power aware synthesis

Tips for power aware synthesis with RTL compiler by using dynamic switching activities from a VCD file. The testbench must include the following lines  to get all the lower-level signals listed on the VCD $dumpfile (“test.vcd.gz”); $dumpvars (0, testbench.module_tb); Synthesis script set_attr lp_power_analysis_effort medium / read_vcd test.rtl.vcd.gz -vcd_module $design # Build detailed power models for …

Thank you, Cadence and Mentor Graphics

Cadence and Mentor Graphics have both announced on the same day (4/12/2008) [1] [2]that Open Verification Methodology is available under the Apache 2 license. While thousands of verification engineers are already using it, now if OVM gets into Fedora repositories, we will be providing industry-class verification tools for our FEL users. OVM is maintained by …