Some highlights from Samsung during #SNUG Silicon Valley 2015 which I deemed interesting: 14LPP Process: 30 tapeouts since 2012, 6 product tapeouts in 2014. 28LPP 9T 15% lower pwr versus 12T. 14LPP 9T 1/3 lower. Benefits over 14LPP over 28LPP: 67% speedup / 59% less power / 45% less area Samsung and GlobalFoundries are collaborating …
Category Archives: On the News
2015 ASIC respin trends by Wilson research
This year’s Wilson research from @mentor_graphics claims that at least a respin is required. However it does not yet state whether it is a planned respin or a bug-fix respin. Wilson research from @mentor_graphics says most #ASIC chips need at least one respin — testandverif (@testandverif) February 5, 2015
Open Source Compiler Roadmap Update Dec 14
Webex hosted by Matthew Gretton-Dann, ARM Engineering Manager, giving an update on the Open Source Compiler roadmap.
ONSemiconductor’s open loop antenna tuning
Ultra-Low-Power 32-bit Microprocessor (ULPMC10)
ITRS 2013 Design difficult challenges
A summary of the ITRS 2013 design difficult challenges can be found here.
TSMC Technology Symposium 2014
Jotting down details from TSMC Technology Symposium 2014 that matters to me. TSMC’s Advanced Backend Technology, including CoWoS™, InFO, etc. InFo, a 3D multi-die assembly technology, based upon CoWoS was introduced. Chip on Wafer on Substrate (CoWoS™) didn’t get traction besides FPGA as it uses geometry 65nm and below to connect the separate die. CoWoS …
#IoT == Internet of Things
smoke detector technique may be good in theory but biased in many ways …
TSMC OIP 2013
Not much news going on over twitter about this year’s #TSMC Open Innovation Platform …