This morning I was trying to compile uvm’ s dpi plug on Fedora 26 and ended with the following error: Model Technology ModelSim – Intel FPGA Edition vlog 10.5c Compiler 2017.01 Jan 23 2017 vlog “+incdir+uvm-1.2/src” uvm-1.2/src/dpi/uvm_dpi.cc ** Warning: ** Warning: (vlog-7032) The 32-bit glibc RPM does not appear to be installed on this machine. …
Category Archives: UVM
template engine
Discovered jinja2, a python template engine, today. It appears to be simple and straight-forward. Plan to use it to auto-generate UVM based frameworks.
Taking advantage of UVM 1.2
Attended the “How to Take Advantage of UVM 1.2 Right Now” by Doulos today. Following are key takeaways for my future testbenches: Objections propagation With set_propagate_mode(1), the objection propagates from the current component up to the top of the hierarchy. While with set_propagate_mode(0) (new in UVM-1.2), the objection is only visible in the current component …
First meeting of the IEEE P1800.2 Working Group
The intention behind my attendance today at the very first IEEE UVM working group conference call was to follow on what will be dropped, loved or enhanced from the UVM 1.2 base. Thus, I’m keen to see in the future whether the final IEEE P1800.2 spec and sources will be released as a free download …
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UVM related command line functions
Some UVM related command line functions on questa: ‘call’ can be used to call any UVM SV function. ‘findregisters, fr’ can be used to find HDL registers for a UVM register model. ‘findsequences, fs’ can be used to find currently active sequences. ‘find insource’ searches through only compiled code to find the given matching string. …
freecellera as a development platform ?
Came across this tweet: @PVCocotb @pmarriott @dave_59 @GordonMcGregor @luked80 http://t.co/Unis4VGGYZ registered. I'll get a placeholder web page up Real Soon. — Bryan Murdock (@bdmurdock) January 14, 2015 The website says: Freecellera Because requiring $7,500 or $25,000 USD a year per member seems counter to the stated goal, “to develop technology standards that are balanced, open, …
UVM: phase objection
Always raise the phase objection in the test (instead of in the sequence), prior to starting any sequence.
(easier-UVM) and @INC
How to generate UVM testbench code from Doulos‘s easier-uvm script on MacOS: Install File::Copy::Recursive perl module cpan install File::Copy::Recursive Include this perl module into @INC (see line 40 on the screenshot below) on easier_uvm_gen.pl.