Digital Timing Models
Seeking a more accurate approach to nanometer delay modeling ?
Both CCS and ECSM timing models model the transient behavior of the driver waveform into a load. Current source models maintain accuracy by capturing the full output waveforms under varying slew and load conditions instead of a single delay and output slew value.
Glitch characterization is also included to ensure correct logical behavior in technologies where coupling capacitance is a significant issue. Transient characterization of standard cells and power gating cells allows validation of the integrity of the power and ground network which is especially important for low-power chips.
Concurrent Current Source
- uses a current source for driver modeling
- A simple rule of thumb then is that where CCS has 20 numbers for each input slew and output load, NLDM stores just 2 numbers. Hence we expect about a 10X increase in the file size of a new CCS timing model compared to an old NLDM timing model.
- consists of current samples as a function of time.
- uses a 2 segment receiver capacitor model. Having 2 segments allows us to have the flexibility to model the Miller Effect as well as the loading of the gate on its driver.
- is said that to provide accuracy to within 2 percent of SPICE and provides a scalable methodology that can support statistical design at 65nm.
“Base Curve Technology” is an extension to CCS approved by Si2 Liberty Technical Advisory Board. Base curve technology allows the CCS data to be represented in a much more compact form in Liberty. Without any loss in accuracy the CCS libraries are up to 3X smaller when base curve technology is utilized.
Accurately capturing the peak current in the waveform is essential to delay calculation accuracy at 65 nm and below. Storing voltage samples as ECSM does, makes it very difficult to recreate an accurate current waveform.
Effective Current Source Model
- is based on current-source modeling
- consists of voltage samples as a function of time
Non-Linear Delay Model
NLDM uses a voltage source for driver modeling. It is must simpler than the other two mentioned above. It uses lookup tables with load and slope as indexes.
Pre-driver method is as if the output of a PWL source is parsed through a low-pass filter.
Typically met for >180nm technology nodes, some foundries provide NLDM libraries as well for advanced nodes. They would characterization tools which supports pre-driver method (an average of the linear ramp and an RC network impulse response (exponential ramp).
In terms of accuracy, one can expect more than 7 % difference with SPICE.